DDR2 SDRAM

DDR2 SDRAM
Double Data Rate 2 Synchronous Dynamic Random-Access Memory
Type of RAM
Front and back of a 2GB PC2-5300 DDR2 RAM module for desktop PCs (DIMM)
DeveloperSamsung[1]
JEDEC
TypeSynchronous dynamic random-access memory
Generation2nd generation
Release dateSeptember 2003 (September 2003)
Standards
  • DDR2-400 (PC2-3200)
  • DDR2-533 (PC2-4266)
  • DDR2-667 (PC2-5333)
  • DDR2-800 (PC2-6400)
  • DDR2-1066 (PC2-8500)
Clock rate100–266 MHz
Cycle time10–3.75 ns
Bus clock rate200–533 MHz
Transfer rate400–1066 MT/s
Voltage1.8 V
PredecessorDDR SDRAM
SuccessorDDR3 SDRAM

Double Data Rate 2 Synchronous Dynamic Random-Access Memory (DDR2 SDRAM) is a double data rate (DDR) synchronous dynamic random-access memory (SDRAM) interface. It is a JEDEC standard (JESD79-2); first published in September 2003.[2] DDR2 succeeded the original DDR SDRAM specification, and was itself succeeded by DDR3 SDRAM in 2007. DDR2 DIMMs are neither forward compatible with DDR3 nor backward compatible with DDR.

In addition to double pumping the data bus as in DDR SDRAM (transferring data on the rising and falling edges of the bus clock signal), DDR2 allows higher bus speed and requires lower power by running the internal clock at half the speed of the data bus. The two factors combine to produce a total of four data transfers per internal clock cycle.

Since the DDR2 internal clock runs at half the DDR external clock rate, DDR2 memory operating at the same external data bus clock rate as DDR results in DDR2 being able to provide the same bandwidth but with better latency. Alternatively, DDR2 memory operating at twice the external data bus clock rate as DDR may provide twice the bandwidth with the same latency. The best-rated DDR2 memory modules are at least twice as fast as the best-rated DDR memory modules. The maximum capacity on commercially available DDR2 DIMMs is 8GB, but chipset support and availability for those DIMMs is sparse and more common 2GB per DIMM are used.[citation needed][3]

  1. ^ Cite error: The named reference phys was invoked but never defined (see the help page).
  2. ^ "JEDEC Publishes DDR2 Standard" (PDF). 2003-09-12. Archived from the original (PDF) on 2003-12-04.
  3. ^ https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/modules/parity_rdimm/htf36c256_512_1gx72pz.pdf?rev=e8e3928f09794d61809f92abf36bfb24 [bare URL PDF]

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